Huawei is encountering significant difficulties in expanding the production of its Ascend 910B AI processors due to insufficient yields at Semiconductor Manufacturing International Co. (SMIC), reports Chosun.biz, a Korean business daily. This impacts Huawei’s ability to develop its artificial intelligence business and highlights China’s inability to be self-sufficient in terms of advanced chip manufacturing.
The Ascend 910B, Huawei’s second-generation AI processor, was designed to substitute for Nvidia’s AI processors (primarily A100), which dominated over 90% of the Chinese market. However, production efficiency remains extremely low, as only 20% of chips that SMIC produces operate as intended.
It should be noted that nearly all large processors made today have defects, but this doesn’t render them unusable. Modern chips are designed to tolerate a varying number of manufacturing defects—vendors merely disable cores or other features to make the chip usable despite the defect.
Different automatic translators (e.g., Google Translate, ChatGPT) translate a phrase in the Korean report about defective Ascend 910Bs differently: some translate that four out of five processors are defective (i.e., they cannot be used), others translate that four out of five have defects (i.e., they can be used with some cores disabled or at lower clocks). We cannot be 100% sure about the interpretation or that the reporter who was given the information understood the context of the statement. It’s safe to assume that Ascend 910B’s yields at SMIC aren’t progressing as expected, but a 20% total yield makes it financially unreasonable to produce these processors anyway, so we don’t think they are that low.
Huawei’s Ascend 910B is reportedly made using SMIC’s second-gen 7nm-class process technology. This production node is also used for Huawei’s HiSilicon Kirin 9000S smartphone application processor. Since this system-on-chip is considerably smaller than the Ascend 910B, its yields should be considerably higher at the same defect density.
Huawei’s Ascend 910 and 910B are pretty large multi-chiplet processors. The die size of the main Ascend 910 chiplet (the Vetruvian) was 456 mm^2, which makes it a very large processor. It is likely that the main SoC of the Ascend 910B is slightly larger, which makes it particularly hard to yield. Yet, it is unlikely that its yield are as low as 20%. An educated guess would be that 20% of the Ascend 910B chips are perfectly fine, and then many of the remaining 80% can be binned and made to work, albeit at lower performance.
Unlike TSMC and Samsung Foundry, which use EUV lithography tools to make chips using advanced process technologies, SMIC has to rely on multi-patterning and DUV lithography machines. These require more production steps, increasing costs and the likelihood of defects and further straining production capacities.
U.S. sanctions are exacerbating these issues by restricting the supply of advanced wafer fab tools and spare parts for advanced DUV lithography tools that SMIC already has. Consequently, maintenance and repair of manufacturing equipment have become problematic, the report says. SMIC lacks sufficient engineers to manage and maintain its semiconductor machinery. Additionally, global equipment suppliers, wary of U.S. sanctions, are reluctant to service advanced machines sold in China, leading to more frequent equipment failures and defective chips.
Looking ahead, Huawei plans to tape out an even more advanced Ascend 910C in September and introduce AI processors using a 5nm process next year. However, given the ongoing equipment and supply chain issues, the company is expected to face similar challenges in scaling up production for these new processors.
These production difficulties have broader implications for major Chinese tech companies like Tencent and Baidu, which rely on Huawei AI processors as alternatives to restricted Nvidia chips. However, SMIC’s supposed inability to achieve expected yields with larger processors using its second-gen 7nm process technology casts doubt on China’s aspirations for semiconductor self-sufficiency.
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